8. Setting TkGate Options

8.1 General Options

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• Site Name: Indicates the name of the organization where this copy of TkGate is installed. This string will be used on any reports generated by TkGate.
• User Name: Indicates the name of the TkGate user. This name will be used as the circuit creator name on reports generated by TkGate.
• Do safe file saving: If enabled, TkGate will use a multi-stage file saving technique to protect the integrity of save files. When saving, TkGate will first save to a temporary file in the same directory as the file being saved. It will then reread that file checking for file inconsistencies. If no inconsistencies are found, it will then rename the temporary file to the target save file. When this option is disabled, the save will occur directly to the target save file with no consistency checks.
• Include cells in save files: If this option is enabled, Verilog modules for TkGate's primitive cells such as AND gates and OR gates will be included in the save file. These cells are not needed by TkGate, but any external simulation or synthesis tool may need these cells in order to interpret the TkGate save files.
• Wire drop port creation: If this option is enabled, ports may be added to modules in edit mode by dropping a wire on the edge of the block. This was the standard port creation method in TkGate 1.8. As of TkGate 2.0, there is a separate editor for module interface creation and thus this feature is no longer needed.
• Do Check-pointing/Frequency: This option enables periodic check-pointing of unsaved files. The checkpoint file will have the same base name as the file you are editing surrounded by '#' characters. It will be saved in the current directory. The frequency specifies a time interval between checkpoints in seconds.
• Max Undo: This option specifies the maximum number of operations that can be undone using the undo/redo feature.
• Enable Help Balloons: Causes help messages to be displayed when the mouse cursor is over certain user interface elements.

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• Key Binding Style: Indicates the basic style for key-bindings. Selecting "emacs" will result in key bindings that are similar to Emacs (e.g., "Ctrl-x Ctrl-s" to save the current file). Selecting "windows" will result in key bindings that are similar to windows (e.g., "Ctrl-s" to save the current file). Selecting "none" will disabled all default bindings. Bindings to not take effect until restarting TkGate.
• Smooth Scrolling: If this option is enabled, scrolling in the main window will be performed using bitmap copies rather than by using redisplays significantly improving scrolling performance. If your X server has problems with bitmap copies, you can disable this feature.
• Region Update: Controls the screen redraw algorithm. Enabling this option will cause redraw events to redraw only the portion of the screen which changes rather than the whole screen. Normally this option should be left enabled, but on X servers with poor clipping implementations, enabling this feature may actually result in slower redrawing.
• Show side-bar images in dialog boxes: Most dialog boxes have side-bars on the left-hand side with an explanation of that dialog box. Unchecking this option will suppress these explanatory messages resulting in slightly smaller dialog boxes.
• Font Set: This option controls the overall size of the fonts used in the user-interface. Choose between "small", "normal", "large" and "huge".

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• Core Editor Toolbars: These are toolbars that are persistent through all modes or are used in circuit edit mode.
• Simulation Mode Toolbars: These are toolbars that are available only while the simulator is active.
• Symbol Editor Toolbars: These are toolbars that are available only when the symbol editor is active.

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• Enable drag-and-drop of selection: When this option is enabled, you can select a block of text with the mouse and drag it to a new location.
• Enabled Automatic Indenting: When this option is enabled, TkGate will do automatic indentation of the HDL text. When enabled, the following additional indenting options can be set:
  • Indentation per level: This specifies the number of characters to indent for each level of scope in the Verilog module.
  • Make begin..end flush with enclosing level: If this feature is enabled, any "begin..end" blocks will be indented the same amount as the statement that encloses it (e.g., the parent "if" statement).
  • Auto indent after return: If this feature is enabled, TkGate will fix formatting each time you press return.
• Enabled Code Colorization: If this feature is enabled, the Verilog text will be colorized based in its semantic meaning. You can choose the color, and whether the text should be in bold or italics.

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• Printer: Specifies the printer to use when printing circuits or traces. TkGate will scan the /etc/printcap files to extract the list of available printers. A "Default Printer" will also be included in the list. The "Advanced..." button can be used to edit the printer command that is associated with that printer.
• Paper Size: Indicates the paper size of the document. If your printer is multi-tray, the appropriate tray will be selected. A variety of U.S. and European/Asian paper sizes are provided.
• Orientation: Indicates the orientation of the diagram on the page. If you select "Portrait", the image will be printed so that the long side of the paper is vertical. If you select "Landscape", the image will be printed so that the short side is vertical.
• Print Double-Sided: Indicates that images should be printed on both sides of the page.  This option is only effective on printers capable of double-sided printing.
• Scale large modules to fit page: Modules which cannot fit on a single page without scaling will be reduced in size so they fit.
• Partition large modules into multiple pages:Modules which cannot fit on a single page without scaling will be split into multiple pages. A key indicating which portion a page represents will be printed in the lower right corner of the page.
• Include index: Prints an index page listing each of the modules in alphabetical order and the pages they are on.
• Include hierarchy graph: Prints a hierarchy graph rooted at the top-level module showing the relationship between parent and child modules.
• Print small modules four per page: Causes modules which can fit into a single quadrant to be grouped and printed on the same page.

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• Epoch Step Size: Specifies the default number of epochs to advance the simulator each time the space bar is pressed.
• Clock Overstep: Specifies the default number of epochs to advance since a clock event when stepping by clock cycles.
• Clock Cycle Step Size: Specifies the number of clock cycles to advance when pressing the Tab key.
• Pop-Up Delay: Specifies the default number of milliseconds to wait before showing the value of a signal when clicking on it.
• Sort traces alphabetically on scope: If enabled, traces in the scope are sorted alphabetically. If not enabled, the traces are listed in the order in which probes were set.
• Enable simulator glitch suppression: Enables a simulation feature that suppresses very fast changes on a signal. When this option is on, oscillations on a gate input faster than that gate's delay will produce "unknown" on the output rather than propagating the oscillations.
• Technology Files: Use this to install additional user-defined delay/area models for gates in addition to the built-in model. Gate delay files have a ".gdf" extension.
• Error Handling: Use this feature to tell TkGate what to do with simulator errors and warnings. One of the following levels can be selected:
  • Cancel simulation on any warnings: If there are any warning messages about the current circuit, do not allow the simulation to start.
  • Always display warnings: If there are any warning messages about the current circuit, display the warnings, but let the simulation start.
  • Display warnings only with errors:If there are any warning messages about the current circuit but there are no error messages, do not display the warnings and let the simulation start. If there are error messages, the warnings will be displayed along with them.
  • Ignore all warnings:Ignore and do not display any warning messages. Only error messages will be displayed.

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• Verilog Library Path: Specifies the list of directories in which to search for Verilog library files. The string "${TKGATE_HOME}" is replaced with the TkGate home directory.
• Base Libraries: Specifies the list of libraries that should be loaded by TkGate on start-up, irregardless of the circuit that is being loaded. Circuit-specific libraries should be specified in the Circuit Properties dialog box.
• VPD (Virtual Peripheral Device) File Path: Specifies the list of directories in which to search for virtual peripheral device files. Virtual peripheral device files have a ".tcl" extension and contain Tcl code conforming to TkGate's VPD protocol.

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• Enable the $tkg$command() system task: If enabled, user circuits can use the $tkg$command(). This system task can send a low-level command directly from the simulator to the TkGate interface. For normal circuits, there is seldom a reason to enable this feature.
• Enable the $fopen() system task: If enabled, user circuits can use the $fopen() system task to open arbitrary files in the user's directory for read and write. This can be useful for debugging circuits, but should not be enabled for untrusted circuits.
• Enable the $writememb() and $writememh() system tasks: If enabled, user circuits can use the $writememb() and $writememh() system tasks to write the contents of a memory to an arbitrary files in the user's directory. This can be useful for debugging circuits, but should not be enabled for untrusted circuits.
• Enable the $tkg$recv() and $tkg$send() system tasks: If enabled, user circuits can use the $tkg$recv() and $tkg$send() system tasks. These are necessary for VPDs (Virtual Peripheral Devices) to work properly.
• The $tkg$exec() system task is: The $tkg$exec() system tasks allows a user to execute an arbitrary Tcl/Tk command in the context of TkGate. Indirectly this could cause an arbitrary shell command to be executed. Some VPD implementations use this mechanism to pass data between the Verilog portion and the Tcl portion. One of the following security settings can be used for this task.
  • fully enabled: Allows unrestricted use of the $tkg$exec() task. This setting is not recommended.
  • enabled only for registered functions: Allows only functions that have been registered as safe or necessary for a VPD to be executed. The '[' and ']' characters are disallowed when this setting is selected.
  • disabled: The $tkg$exec() task is completely disabled and can not be used from user circuits.
• Security Violation Handling: This option specifies what TkGate should do when a user circuit tries to use a system task that has been disabled through this dialog box.
• Stop simulator when disabled feature is used: Any attempted use of a disabled system task will cause the simulator to stop and a warning message to be displayed.
• Display warning message when disabled feature is used: Any use of a disabled system task will cause a warning message to be displayed, but the simulation will continue to execute with the call to the disabled task ignored.
• Ignore attempted usage of disabled features: Any attempts to use a disabled system task will be silently ignored.

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• Edit Window Colors These options specify the color of elements in the main editor window.
  • Background: Sets background color for the editing canvas.
  • Instances: Sets the color used for primitive gates and their labels.
  • Modules: Sets the color used for modules, other than the port names.
  • Module Ports: Sets the color used for port names on modules.
  • Frames: Sets the color used for frames.
  • Comments: Sets the color used for normal comments.
  • Hyperlinks: Sets the color used for hyperlink comments.
  • Single-Bit Wires: Sets the color used for single-bit wires and their labels.
  • Multi-Bit Wires: Sets the color used for multi-bit wires and their labels.
  • Gate Tools: Sets the color for other non-cursor objects used by TkGate (e.g., probes).
  • Critical Path: Sets the color used to highlight the critical path in the circuit.
  • Off LED: Sets the color for LEDs which are off.
  • On LED: Sets the color for LEDs which are on.
  • Floating LED: Sets the color for LEDs for which the input signal is a non 0/1 value. in the logic scope.
• Scope Window Colors
  • Scope Grid: Sets the color for the grid in the logic scope.
  • Logic One: Sets the color for all deterministic non-zero logic values in the logic scope.
  • Logic Zero: Sets the color for zero logic values in the logic scope.
  • Float: Sets the color for floating logic values in the logic scope.
  • Unknown/Conflict: Sets the color for unknown logic values, including the "low" and "high" values, in the logic scope.

8.10 HTML Options

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• Browser Command: Specifies the command to use when the user clicks on a hyperlink starting with "http:". Normally this should point to the user's browser command. A "%s" in the command will be replaced with the text of the hyperlink the user clicked on.
• e-Mail Command: Specifies the command to use when the user clicks on a hyperlink starting with "mail:". Normally this should point to the user's e-mail client. A "%s" in the command will be replaced with the text of the hyperlink the user clicked on.